High speed chip claimed as world’s most efficient

Written by: Andrew Wade | Published:
(Credit: BYU Photo)

Researchers in the US have designed and built what they claim is the world’s most power efficient high-speed ADC microchip.

As the name suggests, ADC (analogue-to-digital converter) microchips change analogue inputs such as radio waves or light into digital signals, and they are pervasive across many electronic device we use today. For handheld devices like smartphones, there is a constant search for high-speed chips with powerful performance, but which can deliver that performance as efficiently as possible in order to prolong battery life.

The new chip, developed by engineers at Brigham Young University (BYU) in Utah, consumes just 21 milli-Watts of power at 10GHz for ultra-wideband wireless communications. According to Professor Wood Chiang from BYU’s Department of Electrical and Computer Engineering, existing ADCs consume hundreds of milli-Watts or even Watts of power at comparable speeds.

"Many research groups worldwide focus on ADCs; it's like a competition of who can build the world's fastest and most fuel-efficient car," he said. "It is very difficult to beat everyone else around the world, but we managed to do just that."

The BYU team achieved these efficiency gains by focusing on the DAC (digital-to-analogue converter) component of the chip. They were able to increase performance through reducing the loading from the DAC by scaling both the capacitor parallel plate area and spacing. They also grouped unit capacitors in a different way from usual, placing together unit capacitors in the DAC rather than having them interspersed throughout. According to the researchers, this lowered the bottom-plate parasitic capacitance by a factor of three, significantly lowering power consumption while at the same time increasing speed.

Finally, they also used a dual path bootstrapped switch where each path can be independently optimised. This method increases the speed but doesn't require additional hardware because it involves splitting existing devices and making route changes in the circuit. The work is published in IEEE Journal of Solid-State Circuits.

"We've proven the technology of the chip here at BYU and there is no question about the efficacy of this particular technique," Chiang said. "This work really pushes the envelope of what's possible and will result in a lot of conveniences for consumers. Your Wi-Fi will continue to get better because of this technology, you'll have faster upload and download speeds and you can watch 4K or even 8K with little to no lag while maintaining battery life."


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